Source
NVIDIA Harnesses Vera CPU to Speed Up Design of Next-Generation CPUs and GPUs | NVIDIA Blog
NVIDIA is collaborating with Cadence and Synopsys to optimize electronic design automation (EDA) applications for the NVIDIA Vera CPU. This effort aims to accelerate compute-intensive chip design stages such as simulation, verification, and implementation.
Why it matters
Faster EDA workflows reduce the time needed to validate designs and identify bugs, which accelerates the overall pace of semiconductor production and development.
The details
- Cadence Jasper and Synopsys VCS showed up to 1.5x higher performance on Vera.
- Vera features 88 Olympus CPU cores and LPDDR5X memory.
- NVIDIA plans a next-generation Rosa CPU powered by the Rigel core.
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In this article
Key connections
NVIDIA owns NVIDIA Vera
NVIDIA designed and manufactures the Vera CPU
NVIDIA plans Rosa as the next-generation CPU successor to Vera
Cadence owns Cadence Jasper
Cadence develops the Jasper formal verification platform
Synopsys owns Synopsys VCS
Synopsys develops the VCS functional verification solution
NVIDIA is a partner of Cadence
NVIDIA is collaborating with Cadence to optimize EDA applications for the NVIDIA Vera CPU
NVIDIA is a partner of Synopsys
NVIDIA is collaborating with Synopsys to optimize EDA applications for the NVIDIA Vera CPU
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NVIDIA Vera uses Electronic Design Automation
NVIDIA Vera is deployed across EDA workflows to accelerate chip design
Cadence Jasper uses Machine Learning
Cadence Jasper uses machine learning to find and fix bugs in chip designs
Cadence competes with Synopsys
Cadence and Synopsys are competing EDA industry leaders
Related events
NVIDIA Deploys Vera CPU Across EDA Workflows With Cadence and Synopsys
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